Over the last few decades, research continues to predict that the transistor density on ICs will become too challenging or not rewarding enough for companies and researchers to continue their shrinkage. However, in a broad sense, Moore’s law continues to hold true. Transistors on computer chips might be hitting a wall in terms of horizontal space, but researchers are now suggesting that the way to expand the transistor density is to expand vertically, not horizontally. That is to say that in the future transistors will begin to stack on top of each other to reduce the overall density. Transistor density is a topic extremely pertinent to the future of computer architecture, and therefore the progression of technology. The main advantages of the shrinkage of transistors for manufacturers of computer chips is that: reduced cost of manufacturing the chips, increased performance of the chip, and reduced power consumption. reduced density of transistors leads to reduced cost of manufacturing the chips. Due to the nature of creating chips, you can fit more transistors on a wafer when the transistors get smaller. Increased performance is a given because (in general) with higher clock rates the same instruction will be executed in fewer time than with lower clock rates. Also the chips have more space to have more pipelines and more cores per chip. These factors also increase performance. Finally, the shrinkage also attributes to reduced power consumption as a smaller transistor will offer more options for power consumptions for the manufacturers to design lower energy costing units. If transistor density hits a wall in terms of its shrinkage, we can see a reduction in the aforementioned progress of computer chips, and technology will reflect these new challenges.